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The idea is that you would apply a high voltage to just the cable, with nothing else attached. If it's just a cable, no harm no foul. On the other hand, if you start seeing smoke from the embedded electronics, you may want to use a different cable.


Unfortunately, that approach will become less useful in the future, as all USB-C cables that support USB 3 and/or high power contain a chip to advertise that fact[1]. (And then there are Thunderbolt cables, which look the same but require even more sophisticated electronics.)

[1] https://e2e.ti.com/blogs_/b/analogwire/archive/2016/03/07/wh...


If anything this is just more reason to avoid USB-C.


You could also just use one of those cheap USB power/voltage monitors as the author does. Obviously a cable alone should not be drawing power.

Maybe an innovative company could add warnings for USB ports that draw power but have no recognized device. For the advanced ports with charging support and so on they should have power monitoring already.


You also see this in chip design EDA tools, at least the good ones. Not only will they record the equivalent CLI command that affects the "data", but some will also record the commands that solely affect the GUI! (e.g. resize window)


And that system maintains a hierarchical relationship, you and your neighbor share the first n words. Makes much more sens e


But why is it important to you? Do you think the other candidates are couldn't, or didn't, produce similarly impressive code?


I'm not necessarily pro-big banks, but JP Morgan and GS were two of the banks LEAST in need of a bailout. GS was short MBS at the time, so your description is .


Those MBS shorts that Goldman Sachs held were with counterparties who couldn't have paid up had they not been bailed out. The same goes for JPM and their monstrous derivatives book, which would have lost enough value to make them insolvent many times over in the absence of a bailout.

The idea that these banks were perfectly healthy is a lie propagated by bailout apologists.


You are correct. Total # of masks for a modern IC can be 30-50 or possibly more. And with double and even quad patterning on the critical layers, that's 2 or 4 masks for a single layer.


Probably because the cost of the mask writers is so huge. As the article says, only 10 - 12 mask writers sales are expected in 2017. My guess is these machines will run 24/7, practically. The more masks it can make, the more units over which you can amortize the capital costs.


"Edit: well I was partially incorrect"

No, you were completely incorrect TBH.


Well project A is using B for a commercial purpose, namely the business of licensing out A. So it seems like it would be your first option, right?


Yes, see Syntacore's SCR1, Clifford Wolf's PicoRV32,etc.

Granted these are smaller, microcontroller-class cores, but still in pure Verilog. I'm sure there are others out there with more/less performance


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