Well, AND and OR "lose information" more than XOR

x.0 is 0 and x+1 is 1 (to use combinational logic notation)

Now XOR(x,y) depend on x and y and there are no values that cause the other value to be ignored

I also think the point they make about speed is kinda picking at straws, it's valid for an FPGA, but not so much for a CPU