Would be great to display this next to a real delidded 6502 to show the level of integration. Then tell people "that was in the 1970s" and explain how big their phone chip would be. Best visual of scaling ever.
An other thing which would be interesting is a 6502 in a modern process, the 6502 had already had such an update in the 8502 (a smaller and less power-hungry 6510). Or possibly a machine-code-compatible version, if the die shots have revealed known issues which could be fixed by redoing the logic.
Or at least an FPGA with a 6502 burned in (like the 65F02) but I'm not sure it would be smaller as i assume the FPGA has a lot more hardware than the 6502 (even needs).
One fix in this variant is that all reserved/undocumented instructions are NOPs, they don't do anything unexpected. Another one is that you can stop the clock entirely and it will not lose track of what it was doing earlier.
